| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a cell array constitution which can read out plural data simultaneously in a multi-bit non-volatile memory circuit consisting of cell transistors having trap gates of non-conductivity. SOLUTION: In a non-volatile memory circuit in which plural cell transistors M having trap gates TG of non-conductivity are arranged, the circuit has plural source/drain lines SDL connected commonly to source/drain regions SD1, SD2 of cell transistors being adjacent in the direction of row, this adjacent source/ drain lines are made a floating state F, a read-out voltage applying state BL, a reference voltage state OV, and a read-out voltage state BL, a source/drain line SDL being in a read-out voltage state is functioned as a bit line. and plural data are read out simultaneously. The above mentioned state is generated by a page buffer P/B connected to a source/drain line. Read-out and holding of data are performed by the page buffer.</p> |
