| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a device capable of efficiently perform bit processing which can not be performed efficiently with instructions of a processor in bit stream processing by the processor. SOLUTION: A memory interface circuit A is provided between a processor and a memory M; and the memory interface A and processor P are connected through an address bus 100, a data bus 103, etc., and the memory interface circuit A and memory M are connected through an address bus 110, a data bus 112, etc. Data read out of the memory M are segmented by a computing element 28, held in an arithmetic result register 32, and sent to the processor P through a processor interface circuit 10.</p> |
