| 摘要 |
PROBLEM TO BE SOLVED: To prevent increase in test time accompanying scale enlargement of a circuit due to realizing individual test designs in a plurality of function circuit blocks (DRAM, logic, or the like) mounted on an LSI formed into one chip and sequentially testing them by using a plurality of testers. SOLUTION: When testing 8 semiconductor integrated circuit 1 with a plurality of function circuit blocks such as a logic 2 and a DRAM 3 mounted together, a test pattern is applied to one of the function circuit blocks (for example, the DRAM 3) in the semiconductor integrated circuit, a unit test of the DRAM 3 is performed, and the test pattern used for the unit test of the DRAM 3 is also used as a test pattern for testing another function circuit block (for example, the logic 2).
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