发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device which operates at a low voltage and in which EMI is reduced, without increasing the space factor of the semiconductor device. SOLUTION: Dummy patterns used in a CMP process are arranged in a field dummy area, separated by a separation insulating film in a p- well 23 which is potential-fixed by a ground electrode. The dummy patterns are gate insulating film dummy patterns 21a and gate electrode dummy patterns 31a, which are formed on the same layers of the gate insulating films 21 and the gate electrodes 31 in NMOS transistors 16. Contact plugs 45, to which power electrode (Vcc) wiring 13 is connected, are connected to gate electrode dummy patterns 31a. Thus, a decouping capacitor formed of the field dummy areas, the gate insulating film dummy patterns 21a and the gate electrode dummy patterns 31a in the p- well 23 is connected to a main electronic circuit in parallel, by using the dummy pattern used in the CMP process.
申请公布号 JP2001118988(A) 申请公布日期 2001.04.27
申请号 JP19990293682 申请日期 1999.10.15
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAGAOKA HIDEAKI
分类号 H01L27/04;H01L21/3105;H01L21/334;H01L21/822;H01L23/552;H01L27/06 主分类号 H01L27/04
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