LINKED LIST DMA DESCRIPTOR ARCHITECTURE

摘要

A linked list DMA descriptor (20, 30) includes an indication of a number of data pointers (22, 32) contained in a subsequent DMA descriptor. The number of data pointers contained in the subsequent DMA descriptor is preferably contained in the memory address of the subsequent DMA descriptor. The number of data pointers is stored by the DMA controller (52) and controls how many read cycles are performed when processing the subsequent DMA descriptor.