发明名称 METHOD AND SYSTEM FOR DEBUGGING A MICROPROCESSOR CORE
摘要 Method and system for debugging a microprocessor core. In one embodiment, the method comprises the step of receiving as input a test program and test data for testing the microprocessor core (220). The method also comprises the step of storing multiple instructions of the test program into a first register of a debugging module (222) in the microprocessor core (220). The method further comprises the step of storing a set of data into a second register of the debugging module (222), wherein the set of data is a subset of the test data. The method also comprises the step of executing those multiple instructions with the set of data. Importantly, those multiple instructions remain in the first register throughout the testing process such that those instructions need only be stored once for all of the test data, even though the test data is processed in separate sets of data. In one embodiment, the present invention includes the above and wherein the debugging module (222) is based on a version of the IEEE 1149.1 standard. In another embodiment, the present invention includes the above and wherein the debugging module (222) supports a version of the N-wire testing standard and extensions thereto.
申请公布号 WO0129666(A1) 申请公布日期 2001.04.26
申请号 WO2000US41446 申请日期 2000.10.19
申请人 SONY ELECTRONICS, INC. 发明人 KASAHARA, EIJI
分类号 G06F11/36;(IPC1-7):G06F11/00 主分类号 G06F11/36
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