发明名称 |
Overvoltage tolerant integrated circuit input/output interface |
摘要 |
An I/O interface circuit which is capable of tolerating the application of an overvoltage condition to a corresponding I/O pad but which also has a relatively low trip point voltage includes an overvoltage detection circuit configured to have a trip point at a first voltage provided by a voltage divider circuit. The voltage divider circuit may include a pair of transistors coupled in series between a voltage source having a second voltage and ground. In such cases, the first voltage may be approximately equal to the difference between the second voltage and a threshold voltage of one of the pair of transistors. Alternatively, the voltage divider circuit may include a NAND gate having an output coupled to the overvoltage detection circuit and an input coupled to receive a second voltage. The second voltage may be determined by a voltage at an I/O pad of the I/O interface and one or more diodes coupled between the I/O pad and the NAND gate.
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申请公布号 |
US6222387(B1) |
申请公布日期 |
2001.04.24 |
申请号 |
US19980179280 |
申请日期 |
1998.10.26 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
MENG ANITA X.;CHOI RONALD |
分类号 |
H03K19/003;(IPC1-7):H03K29/017 |
主分类号 |
H03K19/003 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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