发明名称 |
Synchronous dynamic random access memory and data processing system using an address select signal |
摘要 |
A data processing system (15) including a synchronous random access memory (30) and a method for accessing the synchronous random access memory are disclosed. A digital processor (20) of the data processing system is arranged with a system clock circuit (65) that produces a system clock signal for controlling operation of the digital processor. Addressable storage cells within the synchronous random access memory are accessed in response to the system clock signal and a single select signal such as an address select signal (ADS) to write data into the storage cells or read data out from the storage cells. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
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申请公布号 |
US6223264(B1) |
申请公布日期 |
2001.04.24 |
申请号 |
US19940262161 |
申请日期 |
1994.06.17 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
VOGLEY WILBUR CHRISTIAN |
分类号 |
G06F13/42;G11C7/10;(IPC1-7):G06F13/00;G06F1/04;G11C11/407 |
主分类号 |
G06F13/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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