发明名称 Method for synchronizing clocks in electronic units connected to a multi processor data bus
摘要 A method and apparatus for synchronizing clocks in a master unit (1) and one or more slave units (2) connected to a multi processor data bus (3) including a bus clock signal (4), where the master unit (1) receives from an external source, or generates locally, a master clock signal to be reproduced on each slave. The master unit (1) repeatedly sends data values representing the current data bus clock (4) frequency, and the elapsed master (1) time to slaves (2) via the data bus (3). Each slave (2) on reception of said data values, establishes a division ratio needed to produce the master (1) clock frequency from the bus clock (4) frequency and applies such a division to the bus clock signal (4). The slave (2) keeps a slave (2) time value in units of the time period in the output signal and compares the slave (2) time to the received master (1) and adjusts the frequency division to compensate for time differences and bring the slave (2) time to equal the master (1) time.
申请公布号 AU6126499(A) 申请公布日期 2001.04.24
申请号 AU19990061264 申请日期 1999.09.17
申请人 COMUNIQ ASA 发明人 STEINAR KOLNES
分类号 G06F1/12 主分类号 G06F1/12
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