发明名称 Synchronizing pcm and pseudorandom clocks
摘要 The present invention provides a system having a received pseudorandom number (PN) clock signal, a method for providing a synchronized system clock signal having reduced jitter, said synchronized system clock signal being synchronized with said PN clock signal, the method comprising the steps of: providing a stable high frequency reference signal; dividing said high frequency reference signal to provide a system clock signal having a plurality of system clock phases; and adjustably selecting a system clock phase of said plurality of system clock phases in accordance with the PN signal in order to provide said synchronized system clock signal. <IMAGE>
申请公布号 AU7595400(A) 申请公布日期 2001.04.23
申请号 AU20000075954 申请日期 2000.09.21
申请人 INTERDIGITAL TECHNOLOGY CORPORATION 发明人 JOHN KAEWELL
分类号 H04L7/033;H03L7/06;H03L7/18;H03L7/23;H04B1/707;H04B1/7085;H04B7/26;H04J3/06 主分类号 H04L7/033
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