发明名称 |
METHOD AND CIRCUIT FOR TESTING RAM |
摘要 |
PROBLEM TO BE SOLVED: To shorten test time by decreasing machine cycles for testing a RAM built in a DSP. SOLUTION: Data required for the test are prepared inside a DSP 11. Basic data are stored in a constant ROM(CROM) 20. Then, bit shift is applied by utilizing the data shift function of an ALU 18 while circulating these data and data to be written in a RAM 16 are successively generated. |
申请公布号 |
JP2001109669(A) |
申请公布日期 |
2001.04.20 |
申请号 |
JP19990290540 |
申请日期 |
1999.10.13 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
OHARA YASUSHI |
分类号 |
G06F12/16;G06F11/22;G06F15/78;G11C29/00;G11C29/02;G11C29/10 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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