发明名称 HIGHER HARMONIC PROCESSING CIRCUIT AND HIGH POWER EFFICIENCY AMPLIFIER CIRCUIT USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a super-high power efficiency amplifier circuit for sharply improving load power efficiency without generating any residual reactance components due to parallel stub. SOLUTION: This higher harmonic processing circuit is constituted of a transmission line T11 whose input terminal is connected with an output terminal C of a transistor Q1 for amplification with length which isλ/4 (wavelength is defined asλ) of a basic wave f0, a first transmission line group T2-T7 constituted of n pieces of transmission lines connected in parallel at an output terminal A of the transmission line T11 whose transmission line length L is expressed with a relation of L=λ/4(1+m) (m=1, 2, 3,..., n) and whose top ends are open, and a second transmission line group T2'-T7' constituted of n pieces of transmission lines connected in parallel at the output terminal A whose transmission line Lh is expressed with a relation of Lh+L=λ/2 and whose top ends are open. Thus, the admittance of each stub to the basic wave can be turned into zero so that load power efficiency can be sharply improved.
申请公布号 JP2001111362(A) 申请公布日期 2001.04.20
申请号 JP19990284983 申请日期 1999.10.06
申请人 NEC CORP 发明人 HONJO KAZUHIKO
分类号 H01P1/212;H03F1/02;H03F3/19;H03F3/21;H03F3/60;(IPC1-7):H03F3/60 主分类号 H01P1/212
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