发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enlarge and reduce video signals while reducing required memory capacity. SOLUTION: Inputted video signal data are successively written into three line memories 10a, 10b and 10c based on input side clock. Then, video signal data are successively read from the memories 10a, 10b and 10c, which are not written, based on output side clock.
申请公布号 JP2001109442(A) 申请公布日期 2001.04.20
申请号 JP19990281391 申请日期 1999.10.01
申请人 SANYO ELECTRIC CO LTD 发明人 KAMEI MITSUTOKU;YANAGI KOICHIRO
分类号 H04N7/01;G06T3/40;G09G5/00;G09G5/391;H04N1/393;(IPC1-7):G09G5/00 主分类号 H04N7/01
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