发明名称 CACHE DEVICE AND CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To improve the performance of access to a cache by decreasing the request of a state change to another system by fractionizing the state of managing data blocks on the cache. SOLUTION: A cache controller 18 expresses the state of data blocks in six states newly adding write enable W to invalid I, shared S, exclusive E, modify M and sharing change O. Corresponding to a fetch request from the CPU of a present system to the data block on the invalid state I, when the data block in the modified state M is acquired from the cache device of another system, the cache controller 18 changes the state of the acquired data block from invalid I to write enable W, switches the state of the data block at the destination of acquisition from modify M to invalid I and unnecessitates a state change notice to the other system by the next store request of the present CPU.
申请公布号 JP2001109662(A) 申请公布日期 2001.04.20
申请号 JP19990287757 申请日期 1999.10.08
申请人 FUJITSU LTD 发明人 KURIHARA AKIHIRO;MORI TSUTOMU
分类号 G06F12/08;G06F12/00;(IPC1-7):G06F12/08 主分类号 G06F12/08
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