发明名称 DMA CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a DMA(direct memory access) controller which efficiently uses, especially a memory (receiving buffer), performs data transfer faster and also eliminates an overhead. SOLUTION: This DMA controller which writes print data supplied through a host I/F 1 in a buffer memory 3 by a DMA controller 6, reads the print data from the memory 3 and performs DMA transfer, makes the controller 6 consist of a counter 7 and an address generation write controlling part 8, starts the DMA transfer by a DMA start signal of a CPU 2 and writes the print data supplied from a host device in an address generated by the part 8. The DMA controller continuously writes the print data while a count value of the counter 7 is not, e.g. 'zero', effectively uses a memory area of the memory 3 and performs the DMA transfer of the print data.
申请公布号 JP2001109707(A) 申请公布日期 2001.04.20
申请号 JP19990286214 申请日期 1999.10.07
申请人 CASIO ELECTRONICS CO LTD;CASIO COMPUT CO LTD 发明人 UEHARA SHINGO;KATAOKA SATOSHI
分类号 G06F3/12;G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F3/12
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