发明名称 TRACK AND HOLD CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce higher harmonics distortion. SOLUTION: This track and hold circuit comprises a MOS transistor switch 3 and hold capacitor 4, and higher harmonics distortion is reduced by constituting the circuit so that electric charges accumulated in a gate oxide film capacitor of the MOS transistor of which the bulk potential is varied in the same phase as an input signal Vln and a capacitor between a gate and a source of the MOS transistor do not depend on input voltage.
申请公布号 JP2001110195(A) 申请公布日期 2001.04.20
申请号 JP19990288662 申请日期 1999.10.08
申请人 AGILENT TECHNOLOGIES JAPAN LTD 发明人 KAKIYA HISAO
分类号 G11C27/02;H03K17/00;H03M1/12;(IPC1-7):G11C27/02 主分类号 G11C27/02
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