| 摘要 |
PROBLEM TO BE SOLVED: To assure a low resistance of a gate electrode, gate pattern precision, and reliability in capacity insulating film, etc., related to coexistence of memory and CMOS. SOLUTION: In a memory region Rmemo, a main gate part comprises only a second polysilicon 7, and a silicide region 28 of a low-resistance layer is provided only at the central part of main gate of a control gate while an oxide film 9 provided by thermal oxidation is provided on the side surface of the main gate part. Thus, while low-resistance of the control gate is maintained, the damage by ion-implantation on a tunnel insulating film 3, capacity insulating film 5, and oxide film 6, etc., is suppressed. Since a TEOS film (upper-surface protective film) 8 in a CMOS region Rmos is removed at patterning of a third polysilicon 19 of a pad member, a dimension shift at formation of a gate electrode (second polysilicon 7) in the CMOS region Rmos is less, assuring dimension precision in gate length, etc.
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