发明名称 A METHOD FOR TRANSLATING INSTRUCTIONS IN A SPECULATIVE MICROPROCESSOR
摘要 A method for use by a host microprocessor which translates sequences of instructions from a target instruction set for a target processor to sequenc es of instructions for the host microprocessor including the steps of beginning execution of a speculative sequence of target instructions by committing sta te of the target processor and storing memory stores previously generated by execution at a point (20) in the execution of instructions at which state of the target processor is known, executing the speculative sequence of host instructions until another point (21) in the execution of target instruction s at which state of the target processor is known, rolling back to last committed state of the target processor and discarding the memory stores generated by the speculative sequence of host instructions if execution fail s, and beginning execution of a next sequence of target instructions if executi on succeeds.
申请公布号 CA2379997(A1) 申请公布日期 2001.04.19
申请号 CA20002379997 申请日期 2000.09.06
申请人 TRANSMETA CORPORATION 发明人 TORVALDS, LINUS;BEDICHEK, ROBERT;JOHNSON, STEPHEN
分类号 G06F9/30;G06F9/318;G06F9/38;G06F9/455;(IPC1-7):G06F9/445 主分类号 G06F9/30
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