发明名称 |
Method of fabricating a multi-layered wiring system of a semiconductor device |
摘要 |
A method of constructing a multi-layered wiring system of a semiconductor device is provided, wherein the method includes steps of: sequentially forming first and second conductive layers on a semiconductor unit board having the first insulation layer; forming an anti-reflective layer in a structure of Ti/TiN deposition layers by means of a sputter device having a collimator on the second conductive layer; selectively etching predetermined portions of the anti-reflective layer, the second conductive layer and the first conductive layer to expose predetermined portions of the first insulation layer to form a metal wire; forming the second insulation layer at the front side of the aforementioned structure; forming a via hole by dry-etching predetermined portions of the second insulation layer and the anti-reflective layer to expose predetermined portions on the surface of the metal wire with tapered parts of anti-reflective layer remaining along the edges of the bottom thereof; performing a wet etching process to remove the polymer component from the via hole; performing a RF sputter etching process to remove a natural oxide layer grown on the portions exposed on the surface of the metal wire and the tapered parts of the anti-reflective layer; and forming a conductive plug inside the via hole.
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申请公布号 |
US6218283(B1) |
申请公布日期 |
2001.04.17 |
申请号 |
US19990389026 |
申请日期 |
1999.09.02 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK JOO-SUNG;CHO CHAN-HYOUNG |
分类号 |
H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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