| 摘要 |
In a semiconductor storage device, a dummy redundancy decision circuit detects the endpoint of redundancy decision made by a column redundancy decision circuit and outputs a end-of-redundancy-decision signal RED. Responsive to the signal RED, a control signal generator outputs normal and redundant column control signals NEN and REN to normal and redundant column decoders, respectively, based on a result of the redundancy decision made by the column redundancy decision circuit and represented by a signal XSYP. Accordingly, a time a normal column select signal Y is output to select a normal column and a time a redundant column select signal SY is output to select a redundant column are both later than a reference time by an interval of the same length. In addition, the interval between the end of data line pre-charging and the start of data line potential amplification can be shortened. As a result, data can be read out much faster.
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