发明名称 Direct memory access controller
摘要 The present invention relates to a direct memory access controller, specifically to a direct memory access controller which controls the direct memory access between internal modules and high speed external memories such as SDRAM(Synchronous Dynamic RAM) in high speed digital signal processors having burst transmission feature. The direct memory access controller comprises a plurality of direct memory access controller circuits, a direct memory access bus arbiter, and a direct memory access bus bridge connecting a direct memory access master bus and a direct memory access slave bus and providing a data transmission path between external high speed memories and input/output devices according to a signal from the direct memory access controller which is connected to said master bus.
申请公布号 US6219724(B1) 申请公布日期 2001.04.17
申请号 US19980145331 申请日期 1998.09.01
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM SANG BEOM;CHUN DAE NYUNG;KIM KI HYUN;CHOI JANG SIK;HWANG SEUNG KU;PARK CHEE HANG
分类号 G06F13/28;(IPC1-7):G06F13/00 主分类号 G06F13/28
代理机构 代理人
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