发明名称 Method and apparatus for minimizing parasitic resistance of semiconductor devices
摘要 A semiconductor device includes a substrate, a gate structure, a plurality of sidewall spacers, and a plurality of first silicide layers. The gate structure is positioned above the substrate. The plurality of sidewall spacers are positioned adjacent to the gate structure. The first silicide layers are positioned in the substrate and have first ends that extend underneath the sidewall spacers. A method for forming a semiconductor device includes forming a gate structure above a substrate. A plurality of sidewall spacers are formed adjacent the gate structure. An implant material is disposed into the substrate using a tilted implantation process that is adapted to form first implant regions in the substrate. The implant regions have first ends that extend underneath the sidewall spacers by a first distance.
申请公布号 US6218250(B1) 申请公布日期 2001.04.17
申请号 US19990324183 申请日期 1999.06.02
申请人 ADVANCED MICRO DEVICES, INC. 发明人 HAUSE FREDERICK N.;WIECZOREK KARSTEN;HORSTMANN MANFRED
分类号 H01L21/265;H01L21/285;H01L21/336;H01L29/45;H01L29/49;(IPC1-7):H01L21/336 主分类号 H01L21/265
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