发明名称 GAME MACHINE
摘要 PROBLEM TO BE SOLVED: To retain necessary data at the occurrence of unforeseen power-off such as a power failure to resume a game from the state at power-off at, the release of a power supply and positively retain the data when retaining the necessary data. SOLUTION: In power failure occurrence interruption processing, a CPU first sets disable and then puts all output ports in the OFF state. The CPU stores the contents of each register in a backup RAM area if necessary and sets a power-off flag. The CPU further sets the suitable initial value in a backup check data area of the backup RAM area and takes exclusive OR successively on the initial value and the data of the backup RAM area to set the final computed value into a backup parity data area. The CPU then sets an RAM access inhibiting state and sends out a halt command.
申请公布号 JP2001104611(A) 申请公布日期 2001.04.17
申请号 JP19990286044 申请日期 1999.10.06
申请人 SANKYO KK 发明人 UGAWA SHOHACHI;KONDO NOBORU;SUNAGA YUICHIRO
分类号 A63F7/02;(IPC1-7):A63F7/02 主分类号 A63F7/02
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