发明名称 SUBSTRATE PROCESSING DEVICE
摘要 PURPOSE: To design the layout of, for instance, an application/development device where a processing section can be additionally provided without changing the distance between a processing station and a cassette station. CONSTITUTION: A processing station S2, an interface station S3, and an aligner S4 are connected in this order to a cassette station S1, where wafer cassettes 22 are loaded or unloaded. In the processing station S2, a shelf unit R is disposed on the side of the cassette station 1, a processing section equipped with an antireflection film forming unit 3, an application unit 4, and a developing unit 5 is disposed on the side of the interface station S3, a wafer transfer means MA is disposed between the shelf unit R and the processing section, where the shelf unit R, the processing section, and the wafer transfer means MA are arranged in parallel with the direction in which the cassettes 22 are arranged. By this layout, a processing section can be additionally provided without having to change the distance between a processing station and a cassette station.
申请公布号 KR20010029882(A) 申请公布日期 2001.04.16
申请号 KR20000037856 申请日期 2000.07.04
申请人 TOKYO ELECTRON LIMITED 发明人 UEDA ISSEI
分类号 H01L21/027;G03F7/20;H01L21/00;H01L21/677;H01L21/68;(IPC1-7):H01L21/68 主分类号 H01L21/027
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