摘要 |
PURPOSE: A CMOS integrated circuit having vertical transistor and a method for forming the same are provided to integrate the transistor by providing a device with a source extending portion and a drain extending portion, where the source extending portion and the drain extending portion in a semiconductor substrate are regulated by the thickness of the doped first and third layers of a material, and by providing the second layer with a place for a gate to be formed later. CONSTITUTION: An active region of a device is formed by depositing at least three kinds of layers on a substrate. The first and third layers among these layers are three kinds of layers and regulate a source-extending portion which extends in a plug of a semiconductor material or a drain-extending portion. That is, in the case where the source of the device is formed under a semiconductor plug, the first layer regulates the source extending portion and the third layer regulates the drain-extending portion. In the case where the drain of the device is formed under the semiconductor plug, the first layer regulates the drain-extending portion, and the third layer regulates the source extending portion. The thickness of the second layer regulates the length of gate of the device.
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