METHOD FOR FABRICATING ABRUPT SOURCE/DRAIN EXTENSIONS WITH CONTROLLABLE GATE ELECTRODE OVERLAP

摘要

PURPOSE: A method for fabricating abrupt source/drain extensions with controllable gate electrode overlap is provided to form source/drain extensions having a controllable gate electrode overlap. CONSTITUTION: An oxide layer is formed on a semiconductor substrate(1) and a gate structure(3) on the semiconductor substrate. First sidewall spacer regions(19,21) are formed on the sides of the gate structure. Second spacer regions(23,25) are formed on the sides of the sidewall spacer regions. Upper regions of the gate structure(3) and the sidewall spacer regions are silicided. Portions of source and drain extension regions in the semiconductor substrate adjacent the gate structure are also silicided.