发明名称 SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor device which can accurately evaluate at the time of test without reducing the supply capability of a boosting circuit. SOLUTION: An enhancement type transistor Tr is connected between the output terminal of a boosting circuit BC and a pad VP for test, and a voltage being higher than program voltage Vpp inputted to the pad VP for test by threshold voltage Vth is inputted to its gate using a charging pump circuit CP. Thereby, program voltage Vpp can be supplied to a memory cell without reducing the voltage at the time of a test. After finish of a test, the pad VP for test is separated from the boosting circuit BC, and a leak path is caused at a cut off point. However, as gate voltage of a transistor Tr is ground level, the transistor is turned off, reduction of supply capability of the boosting circuit BC is prevented.</p>
申请公布号 JP2001101883(A) 申请公布日期 2001.04.13
申请号 JP19990273085 申请日期 1999.09.27
申请人 TOSHIBA CORP 发明人 IWATA AKIRA;NODA JUNICHIRO
分类号 G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C16/06
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