| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a level, shift circuit which can suppress a through current, can be constituted without using a high-dielectric-strength transistor and prevented from increase in chip area, and can actualize low power consumption and speeding-up of the operation. SOLUTION: This level shift circuit is provided with series-connected pMOS transistors P1 and P3 and nMOS transistors N3 and N1 and series-connected pMOS transistors P2 and P4 and nMOS transistors N4 and N2 between a source voltage VPP and the ground potential and the transistors P1 and P2 constitute a latch circuit; and input signals IN1 and IN2 having small amplitudes are applied to the gates of the transistors N1 and N2 and a bias voltage VPP/2 is applied to the gates of the transistors P3 and P4, and N3 and N4, so that a large-amplitude signal having an amplitude of VPP level is outputted from an output terminal TOUT corresponding to the input signals IN1 and IN2, so the level shift circuit can be constituted without using any high-dielectric- strength transistor.</p> |
