发明名称 INTEGRATED CIRCUIT WITH A NON-VOLATILE MOS RAM CELL
摘要 A non-volatile, random access memory cell comprises first and second inverters each having an output node cross-coupled by cross-coupling means to an input node of the other inverter for forming a MOS RAM cell. The output node of each inverter is selectively connected via the conductor paths of separate access transistors to respective bit lines. The control electrodes of the access transistors are connected to a common word line. In particular, both RAM and programmable Read-Only operation of said memory cell are provided. Thereto, the cross-coupling comprises capacitors (C1, C2) each in series with a control electrode of a respective p-type transistor of the first and second inverters. This renders both interconnecting nodes between a capacitor and the gate electrode of its associated p-channel transistor floating. Isolators around these nodes render the cell data-retentive. The nodes are transiently and electrically programmable through signals on the bit and word lines of the cell. The nodes are radiation-accessible for internal photo-emission inducing short-wave radiation, that renders a non-permanent programmed information in the cell a non-volatile one.
申请公布号 WO0126113(A1) 申请公布日期 2001.04.12
申请号 WO2000EP09508 申请日期 2000.09.27
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 WIDDERSHOVEN, FRANCISCUS, P.;ANNEMA, ANNE, J.;STORMS, MAURITS, M., N.;PELGROM, MARCELLINUS, J., M.
分类号 G11C11/41;G11C7/20;G11C11/412;G11C16/04;H01L21/8242;H01L21/8244;H01L27/105;H01L27/108;H01L27/11;(IPC1-7):G11C11/412 主分类号 G11C11/41
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