发明名称 |
Address control circuit has selection clock signal, generator of address conversion data for converting test object addresses to memory addresses, conversion data memory, address converter |
摘要 |
The circuit has a selection clock signal for successive selection of the address range for accessing the memory in accordance with test object address information entered from the test device, a generator of address conversion data for converting the test object addresses into specific memory addresses, a conversion data memory and an address converter.
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申请公布号 |
DE10048372(A1) |
申请公布日期 |
2001.04.12 |
申请号 |
DE20001048372 |
申请日期 |
2000.09.29 |
申请人 |
ANDO ELECTRIC CO., LTD. |
发明人 |
KOMIYA, HIROAKI |
分类号 |
G01R31/28;G11C8/00;G11C29/44;G11C29/56;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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