| 摘要 |
A method of manufacturing a hetero-junction bipolar transistor, especially of gallium arsenide, comprising the step of forming superimposed epitaxial layers for forming a collector layer (1) of the n+ type, an emitter layer (3) of the n-type, the formation of localized implantations of the p+ type to obtain the base regions (31,30) or of the n+ type to obtain collector contact islands (20). This method also includes the formation by a controlled etching into a germanium layer (50) formed at the surface of these layers, of pads having a profile such that their tips define with a very high precision openings (E1), of which the distance (E0) between the edges defines the emitter contact region, while their edges have a concavity turned towards the exterior of the device. Application integrated circuits on gallium arsenide.
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