发明名称 Digital phase locked loop.
摘要 <p>A digital phase looked loop for correcting the phase of an input signal has a phase comparator (1) for comparing the phases of the input signal and a feedback signal from a variable frequency oscillator (19). The output signal of the phase comparator (1) representing the phase different is integrated in a low pass filter (18). The output of the low pass filter (18) is applied to a switch (7) which alternately selects between the output of the low pass filter (18) and a zero level signal from a zero generator (13). The output of switch (7) is applied to the variable frequency oscillator (19). The output signal of the variable frequency oscillator is returned to the phase comparator (1), so that the phase of the output signal from the variable frequency oscillator (19) is synchronized with the phase of the input signal.</p>
申请公布号 EP0378190(A2) 申请公布日期 1990.07.18
申请号 EP19900100428 申请日期 1990.01.10
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KOGA, FUMIAKI;MATSUMOTO, TOKIKAZU
分类号 H03L7/06;H03L7/08;H03L7/093 主分类号 H03L7/06
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