发明名称 Method and system for testing multiport memories
摘要 A memory device has first and second sets of memory cells. Each of the cells in the second set is a neighboring cell corresponding to a respective cell of the first set. A data generating function generates a first pattern and a second pattern. A controller causes the first pattern to be written in the first set of memory cells, causes each cell in the second set of memory cells to be read simultaneously while the corresponding neighboring cell in the first set of memory cells is being written to, and causes a datum to be read from each cell in the second set of memory cells after the corresponding neighboring cell in the first set of memory cells is written to. An output data evaluator determines whether the data read from the second set of memory cells match the second pattern, and detects a fault in the memory device, if the data read do not match the second pattern.
申请公布号 US6216241(B1) 申请公布日期 2001.04.10
申请号 US19980168409 申请日期 1998.10.08
申请人 AGERE SYSTEMS GUARDIAN CORP. 发明人 FENSTERMAKER LARRY RAY;HIGGINS FRANK P.;KIM ILYOUNG;LEWANDOWSKI JAMES LOUIS;NAGY JEFFREY JAY
分类号 G11C29/12;G11C29/50;(IPC1-7):G11C29/00 主分类号 G11C29/12
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