发明名称 Partial semiconductor wafer processing
摘要 Partial wafer processing is achieved by down loading the wafer map of the whole wafer from a host (2) and if the partial wafer (half or quarter) contains the reference die (4) move table to a locator die (5) and upload locator die coordinates to wafer map data host (6) and remove other half or quadrants die coordinates from the map (10). If the partial wafer is not in the first half or first quadrant position wafertable to auxiliary reference die, find out which half or quadrant partial wafer belongs (8) and compute auxiliary reference die coordinates from locator die coordinates (9) and then using auxiliary die coordinates as information remove other quadrant or half die coordinates from the map (10).
申请公布号 US6216055(B1) 申请公布日期 2001.04.10
申请号 US19980188989 申请日期 1998.11.09
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 BALAMURUGAN SUBRAMANIAN;WONG CHIE-KEONG;KENT RUSSELL A.
分类号 H01L21/00;H01L21/68;H01L23/544;(IPC1-7):G06F19/00;H01L21/301 主分类号 H01L21/00
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