| 摘要 |
A programmable counter circuit for use in semiconductor memories for generating both sequential and interleave address sequences for block data accesses is disclosed. The output and complementary output of a burst counter circuit are multiplexed to send the proper carry bit information to the row/column counter of a memory device. In interleave mode, the carry bit is forced to match that of the burst counter, thus forcing the row/column counter of the memory device to count in an interleave address sequence. In sequential mode, the start address of the memory access is captured and held. Either the output or complementary output of the burst counter is used to control the column counter based on the captured start address bit. The counter can be programmed to automatically increment the memory address in both a binary and interleave sequence in order to increase the access speed for blocks of sequential data in semiconductor memories.
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