| 摘要 |
Asynchronous sample rate conversion is performed using a noise-shaped numerically controlled oscillator (204,420) that generates a clock (207,428) that is synchronous to the system clock (217,424) but having a time average frequency that is equal to a multiple (X) of the asynchronous sample rate frequency required for the conversion. Unwanted spectral energy in the generated clock (207,428) is noise-shaped out of the pass-band and so does not degrade signal performance. For digital-to-analog conversion, the generated clock (207) is used to time an interpolation (206) of digital data (DATAFs) by an multiple X to produce an interpolated signal (DATAFsX) having a time average rate equal to the over-sampling frequency but being synchronized with the system clock (217). The interpolated signal (DATAFsX) is then converted (216) to an analog signal using a derivative of the system clock (217), or can be output as digital data at the rate derived from the system clock. For analog-to-digital conversion, the generated clock (428) clocks an analog-to-digital conversion (415) synchronous with the system clock but having a time average of the over-sampling frequency. It can be seen the present invention performs asynchronous sample rate conversion without the need for an analog PLL and with simplified circuitry such that no multipliers or DSP utilization is required.
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