发明名称 Electrostatic discharge protection circuit for a semiconductor integrated circuit and layout thereof
摘要 In accordance with the present invention, a semiconductor integrated circuit comprises an internal circuit, an output driver circuit connected to the internal circuit for amplifying an output signal from the output driver circuit to output an amplified output signal, at least a first electrode pad connected to the output driver circuit for receipt of the amplified output signal from the output driver circuit, a first ground line connected to the internal circuit for supplying a ground potential to the internal circuit and a second ground line connected to the output driver circuit for supplying the ground potential to the output driver circuit, wherein at least an electrostatic discharge protection circuit is provided between the first electrode pad and the second ground line.
申请公布号 US6215157(B1) 申请公布日期 2001.04.10
申请号 US19990365168 申请日期 1999.08.02
申请人 NEC CORPORATION 发明人 FUKUDA TAKESHI
分类号 H01L27/04;H01L21/822;H01L23/60;H01L27/02;(IPC1-7):H01L23/62 主分类号 H01L27/04
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