发明名称 STRUCTURE AND METHOD FOR MANUFACTURING CONDUCTIVE LAYER OF SEMICONDUCTOR DEVICE USING DAMASCENE PROCESS
摘要 PURPOSE: A method for manufacturing a conductive layer of a semiconductor device using a damascene process is provided to prevent a bridge phenomenon between adjacent conductive layers even though a scratch is generated during a chemical mechanical polishing(CMP) process, by forming an insulating layer on a sidewall of a conductive layer. CONSTITUTION: The first interlayer dielectric(130) is formed on a semiconductor substrate(100). The first interlayer dielectric is planarized to perform a chemical mechanical polishing(CMP) process. A hole is formed in the first interlayer dielectric by a photolithography process. The first insulating layer(160) is formed on a sidewall of the hole. The first conductive layer(170) is formed on the first interlayer dielectric and the first insulating layer in the hole. The first conductive layer is planarized to expose the surface of the first interlayer dielectric by a CMP process. The second interlayer dielectric(190) is formed on the first interlayer dielectric and the first conductive layer. A contact hole(200) penetrating the second and first interlayer dielectrics is formed by a photolithography process. The second insulating layer(210) is formed on a sidewall of the contact hole. The second conductive layer(220) is formed on the second insulating layer to completely fill the contact hole.
申请公布号 KR20010027381(A) 申请公布日期 2001.04.06
申请号 KR19990039085 申请日期 1999.09.13
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, GANG SIK;CHO, HU SEONG;JUNG, GYU CHEOL;KIM, HONG GYUN
分类号 H01L21/3205;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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