| 摘要 |
PURPOSE: A column address buffer and a method for generating an odd and an even-numbered column addresses are provided to divide a column address into an odd and an even and then simultaneously output at the leading edge and the down edge of a clock signal. CONSTITUTION: The column address buffer includes the first input latch(33), first and second switching portions(34,35), the second input latch(36), first and second output latches(37,38). The first input latch latches an outer address at the descending edge of a clock signal in an outer address inputting mode. The first and second switching portions respectively output an outer addresses latched to the first input latch at the ascending edge of a clock signal in the outer address input mode. The second input latch latches a column address generated by an inner address counter in an inner address inputting mode at the descending edge of a clock signal and then outputs a latched inner address at the ascending edge. The first output latch latches an outer address supplied through the first switching portion and a column address supplied from the second input latch and then generates an even-numbered column address. The second output latch latches an outer address supplied through the second switching portion and a column address supplied from the second input latch and then generates an even-numbered column address.
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