| 摘要 |
PROBLEM TO BE SOLVED: To provide a technology for detecting the incorrect delay of a logic block without causing a significant increase of product cost. SOLUTION: A self diagnostic circuit comprises a first circuit 601 generating a clock signal for performing scanning operation through a scan path at a rate lower than the actual working rate of a diagnostic block, and a second circuit 602 generating a clock signal for performing supply of pseudo-random numbers to a logic block and collection of output signals therefrom at a rate substantially equal to the actual working rate of the logic block. Consequently, the incorrect delay of the logic block can be detected without reducing the line resistance by enlarging the line width or providing an amplifier in the scan path. |
