| 摘要 |
PURPOSE: A ferroelectric memory is provided to increase judgement reliability for a data being read from a ferroelectric memory and easily embody high integration CONSTITUTION: The ferroelectric memory includes a large number of unit cell groups, a dummy cell group and a large number of switching transistors(ST0-ST5). The large number of unit cell groups are in series connected to each of bit lines(BL0,/BLO,BL1,/BL1) by a method being alternatively arranged every two rows or two columns. The dummy cell group includes a large number of dummy cells(DC0,DC0',DC1,DC1') which are respectively connected to any position of each of the bit lines and which are respectively consisted of one transistor and one capacitor. The switching transistor group is consisted of a large number of switching transistors which switch a connection between unit cells of each of the bit lines corresponding to each of the dummy cells switch a connection between input and output of two dummy cells of a large number of dummy cells and in response to a control signal from the outside. The ferroelectric memory supplies a mean voltage supplied between dummy cells connected two bit lines in close to the selected bit line to a bit line in close the selected bit line as a reference voltage for comparing with a voltage corresponding to a read data when a data is read from any unit cell of one bit line selected among the large number of bit lines.
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