| 摘要 |
PURPOSE: A method for fabricating a bit line and a capacitor of a DRAM cell is provided to improve a step coverage of a contact. CONSTITUTION: The first insulating layer(113) is formed on a semiconductor substrate(100) having a transistor and then patterned to simultaneously form first and second contact holes respectively exposing first and second impurity regions(112a,112b). The impurity regions(112a,112b) are then respectively connected to a storage node contact plug and a bit line contact plug simultaneously formed in the contact holes. Then, the second insulating layer(119b) is formed and patterned to simultaneously form a storage node contact hole and a bit line contact hole. Next, a bit line(130b) and the third insulating layer(132b) are formed above the bit line contact plug. After that, first and second spacers(133b,133b) are simultaneously formed on respective sides of the bit line(130b) and the storage node contact hole. After the fourth insulating layer is patterned on an entire surface, a polysilicon layer and the fifth insulating layer are sequentially formed thereon and polished to form a lower electrode(139b) of the capacitor. The fourth and fifth insulating layers are then removed.
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