发明名称 INTERFACE LAYOUT METHOD IN RAMBUS DRAM MORE THAN 256M
摘要 PURPOSE: An interface layout method in a RAMBUS DRAM is provided to satisfy requisite for the 400MHz operation and simultaneously minimize the size of an interface area. CONSTITUTION: The interface layout method puts an area more than a predetermined length between the first data input/output pad area(100), a DDL(Delay Locked Loop) circuit area(92), a control signal inputting pad area(102) and the second input/output pad area(104). A standard area(90) is disposed in the area more than the predetermined length. As disposing a standard portion between pad areas, the height of the interface area is reduced and the length of a clock line is reduced because cells operating with 400MHz are laid in close. Accordingly, power consumption is reduced.
申请公布号 KR20010026384(A) 申请公布日期 2001.04.06
申请号 KR19990037674 申请日期 1999.09.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, HWA YONG;KYUNG, GYE HYEON
分类号 G11C5/02;(IPC1-7):G11C5/02 主分类号 G11C5/02
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