发明名称 DEVICE AND METHOD FOR DETECTING ZERO RESULT
摘要 PROBLEM TO BE SOLVED: To provide a relatively simple zero result predicting mechanism for detecting a zero result without performing any completely arithmetic operation to the number of inputs for largely increasing processing speeds of the various arithmetic operations. SOLUTION: In order to detect the zero result of the sum of a first operand A, a second operand B, and a carry bit Cin, A (bar) and A (bar)+1 are calculated, and then one of them is compared with the second operand B dependently of the carry bit Cin (Cin=0, A (bar); Cin=1, A (bar)+1) in this zero result detector.
申请公布号 JP2001092631(A) 申请公布日期 2001.04.06
申请号 JP20000236614 申请日期 2000.08.04
申请人 ARM LTD 发明人 STEER DAVID WILLIAM;HUTCHISON GUY TOWNSEND
分类号 G06F7/00;G06F7/02;G06F7/50;G06F7/505 主分类号 G06F7/00
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