发明名称 BIAS DEVICE AND AMPLIFIER
摘要 PROBLEM TO BE SOLVED: To provide a bias device of high performance and high efficiency. SOLUTION: A negative conductance circuit 11 consists of a first differential pair transistor 11a and a second differential pair transistor 11b. The transistor 11b is cascade-connected to the first differential pair transistor through resistors and in order to be negative conductance with respect to the conductance of the transistor 11a, gate terminals are mutually connected to the drain terminals of a pair of transistors M3 and M4. A bias circuit 12 connects the source terminals of both of the transistors M3 and M4 of the transistor 11b through a resistor 2×R1 to supply a DC bias to input points p1 and p2.
申请公布号 JP2001094363(A) 申请公布日期 2001.04.06
申请号 JP19990270706 申请日期 1999.09.24
申请人 SONY CORP 发明人 HIRABAYASHI ATSUSHI
分类号 H03F3/45;H03F1/02;(IPC1-7):H03F3/45 主分类号 H03F3/45
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