发明名称 BOOSTING CIRCUIT FOR SEMICONDUCTOR MEMORY
摘要 PURPOSE: To enable compensating variation of power source voltage of boosting voltage having dependency on the positive power source voltage by providing a compensation circuit having the dependency on the negative power source voltage to suppress the variation of the boosting voltage caused by the variation of the power source voltage and generating the control voltage having the dependency on the negative power source voltage. CONSTITUTION: A clamp circuit 501 of a boosting circuit has power source voltage and temperature compensating circuits 502, 503. The power source voltage and temperature compensating circuit 502 outputs an output IN1 being the constant voltage independently of the power source voltage VCC and an output IN2 of which a voltage value is boosted as the power source voltage VCC is boosted. The power source voltage and temperature compensating circuit 503 decrease the voltage value of anode clamp as the power source voltage is boosted in accordance with the output IN1 and In2. That is, the node clamp has dependency on the negative power source voltage. Thereby, the dependency on the positive power source voltage of voltage of a node bb3 can be compensated, consequently, the dependency on the positive power source voltage of boosting voltage of a node (a) can be compensated.
申请公布号 KR20010029613(A) 申请公布日期 2001.04.06
申请号 KR20000017247 申请日期 2000.04.03
申请人 FUJITSU LIMITED 发明人 EINAGA YUICHI
分类号 G11C16/06;G11C5/14;(IPC1-7):G11C5/14 主分类号 G11C16/06
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