CIRCUIT FOR GENERATING SENSE AMPLIFICATION CONTROL SIGNAL OF SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A circuit for generating a sense amplification control signal is provided to reduce a refresh current by reducing a pulse width of an over driving section when performing a refresh operation, wherein a signal path during a refresh operation is different a signal path during a normal operation. CONSTITUTION: The circuit includes the first and second delay portions(30,40) and a logic portion(50,20). The first delay portion outputs by delaying a sense amplification enable signal by the first predetermined delay time. The second delay portion outputs by delaying an output signal of the first delay portion by the second predetermined delay time. The logic portion performs a logic calculation by classifying as a normal operation and a refresh operation about a delay signal applied from the first and second delay portions in response to a refresh control signal. The over driving section during the normal operation is differently set from the over driving section during the normal operation. The circuit performs the over driving for a time summing the first and second delay times during a normal operation and generates a sense amplification control signal performing the over driving for the first delay time during the refresh operation.