发明名称 CIRCUIT AND METHOD FOR DETECTING DEFECT CELL IN SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A circuit and a method for detecting a defect cell in a semiconductor device are provided to exactly detect a defect memory cell and the position of the defect memory cell through current detectors built in as the least number and minimize degradation of an operation speed by the current detectors at a normal operation. CONSTITUTION: The circuit includes a memory cell array(100) and a large number of defect cell detecting portions(140-144). The memory cell array includes a large number of memory blocks(110-114) having a large number of memory cells(116) being, correspondently to a predetermined memory address, addressed. The large number of defect cell detecting portions correspond to each of the large number of memory blocks, compare a current, which is generated from the corresponding memory blocks, with a reference current and respectively detect whether a memory cell being addressed is a defect memory cell or not.
申请公布号 KR20010027544(A) 申请公布日期 2001.04.06
申请号 KR19990039338 申请日期 1999.09.14
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JIN SEONG
分类号 G01R31/28;G11C11/413;G11C29/00;G11C29/04;G11C29/14;G11C29/50;(IPC1-7):G11C29/00 主分类号 G01R31/28
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