| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit layout system by which a turn-around- time for development can be reduced. SOLUTION: A dummy gate processing part, after obtaining a net list, generates a net list into which a dummy gate is inserted (step S13). A floor-plan processing part performs division of modules and grouping in accordance with the net list stored in a net list storing part (step S16). Also, the floor plan processing part, after distributing dummy gates to each divided object module, performs area division in each object module (step S18). A layout processing part determines coordinates, in such a way that dummy gates are uniformly disposed in each divided area (step S22) and performs wiring of all nets (step S25).
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