发明名称 CLOCK GENERATION AND DISTRIBUTION IN AN EMULATION SYSTEM
摘要 <p>A method and apparatus for clock generation and distribution in an emulation system is described. The present invention provides a method and apparatus for generating a derived clock signal with a circuit having a look up table. A counter circuit counts clock cycles and provides an index into the look up table. A frequency divider circuit may be used between the counter circuit and a base clock signal to provide an intermediate clock signal with a frequency that is less than the frequency of the base clock signal. In one embodiment, a selection circuit is provided to select between the base clock signal and an external clock signal.</p>
申请公布号 WO2001024008(A1) 申请公布日期 2001.04.05
申请号 US2000003261 申请日期 2000.02.08
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